Japanese Patent Application Publication No. 2001-186768 describes a DC-DC converter that boosts a voltage supplied from a direct current source and outputs the boosted voltage. This DC-DC converter includes two lower FETs (field effect transistors) of n-channel type, and a source of each of the lower FETs is connected to a low potential wiring. A drain of the first lower FET is connected to a high potential output wiring via a first diode. A drain of the second lower FET is connected to the high potential output wiring via a second diode. Moreover, this DC-DC converter has a main reactor, a first sub-reactor, and a second sub-reactor. The main reactor includes a first terminal and a second terminal. The first terminal of the main reactor is connected to a diode bridge (a type of direct current source) via a high potential input wiring. One end of the first sub-reactor is connected to the second terminal of the main reactor, and other end of the first sub-reactor is connected to the drain of the first lower FET. One end of the second sub-reactor is connected to the second terminal of the main reactor, and other end of the second sub-reactor is connected to the drain of the second lower FET. The first and second lower FETs are controlled to be turned on alternately. A current flows through the first diode when the first lower FET is switched from on to off, and a current flows through the second diode when the second lower FET is switched from on to off. Consequently, a high voltage is outputted to the high potential output wiring. Moreover, controlling the first and second lower FETs as such reduces a switching loss that occurs in the first and second lower FETs.